; bdiGDB configuration for TI OMAP3430 ; ------------------------------------ ; ; Commands supported in the SCANINIT and SCANPOST strings: ; ; I=<...b2b1b0> write IR, b0 is first scanned ; D=<...b2b1b0> write DR, b0 is first scanned ; n : the number of bits 1..256 ; bx : a data byte, two hex digits ; W wait for n (decimal) micro seconds ; T1 assert TRST ; T0 release TRST ; R1 assert RESET ; R0 release RESET ; CH clock TCK n (decimal) times with TMS high ; CL clock TCK n (decimal) times with TMS low ; ; [INIT] ;WGPR 11 0x40200020 ;set frame pointer to free RAM ;WM32 0x40200020 0x40200028 ;dummy stack frame WM32 0x6d000010 0x00000002 ;write sysconfig, reset sdrc controller DELAY 30000 WM32 0x6d000010 0x00000000; remove reset in sysconfig WM32 0x6d000044 0x00000100; write sharing with SDP_SDRC_SHARING. setup sdrc to ball mux ; Disable Power Down of CKE cuz of 1 CKE on combo part WM32 0x6d000070 0x00000081; write power_reg SRFRONRESET & PAGEPOLICY_HIGH WM32 0x6d000060 0x0000000A; write dlla_ctrl ENADLL & DLLPHASE_90 DELAY 30000 WM32 0x6d000080 0x02584099; write mcfg_p with RASWIDTH_13BITS & CASWIDTH_10BITS & ADDRMUXLEGACY & RAMSIZE_128 & BANKALLOCATION & B32NOT16 & DEEPPD & DDR_SDRAM WM32 0x6d0000A4 0x0004e201; write rfr_ctrl with ARCV & ARE_ARCV_1 WM32 0x6d00009C 0xAA9DB4C6; write ctrla with V_ACTIMA_165 WM32 0x6d0000A0 0x00011517; write ctrlb with V_ACTIMB_165 WM32 0x6d0000A8 0x00000000; write manual with CMD_NOP WM32 0x6d0000A8 0x00000001; write manual with CMD_PRECHARGE WM32 0x6d0000A8 0x00000002; writel manual with CMD_AUTOREFRESH WM32 0x6d0000A8 0x00000002; writel manual with CMD_AUTOREFRESH ;CAS latency 3, Write Burst = Read Burst, Serial Mode, Burst length = 4 WM32 0x6d000084 0x00000032; write mr with CASL3 & BURSTLENGTH4 ;WM32 0x6d000080 0x00000000; write mcfg with 0 if configuration failed ; [TARGET] CPUTYPE OMAP3430 CLOCK 2 ;JTAG clock 16 MHz ;CLOCK 4 ;JTAG clock 8 MHz (for slow access to boot flash) POWERUP 2000 ;power-up delay TRST PUSHPULL ;TRST driver type (OPENDRAIN | PUSHPULL) RESET HARD ;NONE | SOFT | HARD (ms) ;STARTUP HALT STARTUP STOP 5000 ;let boot code setup the system ENDIAN LITTLE ;memory model (LITTLE | BIG) WAKEUP 100 MEMACCESS CORE 10 ;memory access via core (80 TCK's access delay) ;MEMACCESS AHB 8 ;memory access via AHB (64 TCK's access delay) SCANPRED 1 6 ;count for ICEPick TAP SCANSUCC 0 0 ;no device after Cortex-A8 ; Configure ICEPick module to make Cortex-A8 DAP-TAP visible SCANINIT t1:w1000:t0:w1000: ;toggle TRST, SCANINIT ch10:w1000: ;clock TCK with TMS high and wait SCANINIT i6=07:d8=89:i6=02: ;connect and select router SCANINIT d32=81000080: ;IP control: KeepPowered SCANINIT d32=a3002048: ;TAP3: DebugConnect, ForcePower, ForceActive SCANINIT d32=81000081: ;IP control: KeepPowered, SysReset SCANINIT d32=a3002148:cl10: ;enable TAP3, clock 10 times in RTI SCANINIT i10=ffff ;scan bypass ; [HOST] IP 151.120.25.112 FILE E:/temp/dump1024k.bin FORMAT BIN 0x80000000 LOAD MANUAL ;load file MANUAL or AUTO after reset PROMPT OMAP3430> [FLASH] ; only to test helper code execution WORKSPACE 0x80001000 ;workspace at 0x1000 CHIPTYPE AM29BX16 CHIPSIZE 0x400000 BUSWIDTH 16 FILE E:/temp/dump1024k.bin FORMAT BIN 0x80300000 [REGS] FILE $regOMAP3430.def