;bdiGDB configuration file for PPC750 evaluation system
; ------------------------------------------------------
;
[INIT]
; init core register
WREG    MSR             0x00001002      ;MSR  : ME,RI

; init memory controller
;WM32    0x00000000      0x12345678      ;only for test

; Setup MMU info
WM32    0x000000f0  0x00000000  ;invalidate page table pointer pointer


[TARGET]
CPUTYPE     750         ;the CPU type (603EV,750,8240,8260)
JTAGCLOCK   0           ;use 16 MHz JTAG clock
WORKSPACE   0x00000000	;workspace for fast download and cache flush
BDIMODE     AGENT     	;the BDI working mode (LOADONLY | AGENT | GATEWAY)
BREAKMODE   SOFT      	;SOFT or HARD, HARD uses PPC hardware breakpoint
MMU         XLAT	;translate effective to physical address
PTBASE      0x000000f0  ;here is the pointer to the page table pointers
DCACHE      FLUSH
VECTOR      CATCH       ;catch unhandled exceptions
MEMDELAY    2000        ;additional memory access delay
PARITY      ON          ;enable data parity generation

[HOST]
IP          151.120.25.115
;FILE        E:\cygnus\root\usr\demo\ppc750\vxworks
;FORMAT      ELF
FILE        E:\cygnus\root\usr\demo\ppc750\zImage
FORMAT      IMAGE
LOAD        MANUAL      ;load code MANUAL or AUTO after reset
DEBUGPORT   2001

[FLASH]

[REGS]
IMM1        0xFF500000  0xFF500004      ;PIFCFGADR and PIFCFGDATA
IMM2        0xFF500008  0xFF50000c      ;MEMCFGADR and MEMCFGDATA
FILE        E:\cygnus\root\usr\demo\ppc750\cpc700.def