; bdiGDB configuration file for the MGT5200 Lite5200 evaluation board ; ------------------------------------------------------------------- ; ; dBug is used to setup the target. ; dBug has to present in the boot flash ; ; [INIT] ; init core register WREG MSR 0x00001002 ;MSR : ME,RI ; define maximal transfer size TSZ4 0x00000000 0x03FFFFFF ;ROM space TSZ4 0x10000000 0x107FFFFF ;ROM space TSZ4 0x80000000 0x80003FFF ;internal registers TSZ4 0x80008000 0x8000BFFF ;internal registers TSZ4 0xF0000000 0xF0003FFF ;internal registers TSZ4 0xF0008000 0xF000BFFF ;internal registers ; define the valid memory map MMAP 0x00000000 0x03FFFFFF ;Memory range for SDRAM MMAP 0x10000000 0x107FFFFF ;Memory range for FLASH MMAP 0x80000000 0x80003FFF ;Memory range for Internal Register MMAP 0x80008000 0x8000BFFF ;Memory map for On-chip SRAM MMAP 0xFF000000 0xFFFFFFFF MMAP 0xF0000000 0xF0003FFF ;Memory range for Internal Register MMAP 0xF0008000 0xF000BFFF ;Memory map for On-chip SRAM TSZ2 0x30000000 0x30000FFF ;Maxwell V Space MMAP 0x30000000 0x30000FFF ;Memory range for Maxwell V WM32 0x80000000 0x0000F000 WM32 0xF0000034 0x00000019 ;SDRAM Start = 0x00000000 ; Size = 64MBytes WM32 0xF0000108 0xC2233A00 ;SDRAM Config 1 WM32 0xF000010C 0x88B70004 ;SDRAM Config 2 WM32 0xF0000104 0xD14F0000 ;SDRAM Control WM32 0xF0000104 0xD14F0002 ;SDRAM Control WM16 0xF0000100 0x048D ;SDRAM Mode WM32 0xF0000104 0xD14F0002 ;SDRAM Control WM32 0xF0000104 0xD14F0004 ;SDRAM Control WM16 0xF0000100 0x0400 ;SDRAM Mode WM32 0xF0000104 0x514F0000 ;SDRAM Control WM8 0xF0000204 0x08 ;CDM PORSTCFG Mode WM32 0xF0000004 0x00001000 ;CS0STR: start = 0x10000000 WM32 0xF0000008 0x0000107F ;CS0STP: stop = 0x107fffff WM32 0xF000001C 0x00003000 ;CS3STR: start = 0x30000000 WM32 0xF0000020 0x000030FF ;CS3STP: stop = 0x30ffffff ;WM32 0xF000030C 0x000e1500 ;CS3CR: configuration WM32 0xF000030C 0x00141500 ;CS3CR: configuration PCI_CLK = 66MHz WM32 0xF0000054 0x02090001 ;ADREN: CSBOOT + CS0 + CS3 + WSE WM32 0xF0000318 0x01000000 ;CSCTRL:Master Enable Bit ;invalidate BAT registers to avoid error states WSPR 528 0x0000 ;ibat0u WSPR 529 0x0000 ;ibat0l WSPR 530 0x0000 ;ibat1u WSPR 531 0x0000 ;ibat1l WSPR 532 0x0000 ;ibat2u WSPR 533 0x0000 ;ibat2l WSPR 534 0x0000 ;ibat3u WSPR 535 0x0000 ;ibat3l WSPR 560 0x0000 ;ibat4u WSPR 561 0x0000 ;ibat4l WSPR 562 0x0000 ;ibat5u WSPR 563 0x0000 ;ibat5l WSPR 564 0x0000 ;ibat6u WSPR 565 0x0000 ;ibat6l WSPR 566 0x0000 ;ibat7u WSPR 567 0x0000 ;ibat7l WSPR 536 0x0000 ;dbat0u WSPR 537 0x0000 ;dbat0l WSPR 538 0x0000 ;dbat1u WSPR 539 0x0000 ;dbat1l WSPR 540 0x0000 ;dbat2u WSPR 541 0x0000 ;dbat2l WSPR 542 0x0000 ;dbat3u WSPR 543 0x0000 ;dbat3l WSPR 568 0x0000 ;dbat4u WSPR 569 0x0000 ;dbat4l WSPR 570 0x0000 ;dbat5u WSPR 571 0x0000 ;dbat5l WSPR 572 0x0000 ;dbat6u WSPR 573 0x0000 ;dbat6l WSPR 574 0x0000 ;dbat7u WSPR 575 0x0000 ;dbat7l [TARGET] CPUTYPE 5200 ;the CPU type JTAGCLOCK 0 ;use 16 MHz JTAG clock WORKSPACE 0x00400000 ;workspace in SDRAM for fast download and cache flush STARTUP RESET ;STARTUP STOP 600 ;Use this if booting from flash WAKEUP 2000 ;give reset time to complete MEMDELAY 4000 ;additional memory access delay BOOTADDR 0x100 [HOST] ;IP 151.120.25.119 FILE /home/vchan_local/mtg5200/pogostick.elf FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset ;START 0x100 [FLASH] CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x800000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) ;FILE E:\cygwin\home\bdidemo\mpc4200\dbug5200.bin ;FORMAT BIN 0xFFF00000 ;FILE E:\cygwin\home\bdidemo\mpc4200\mgt5200.cfg ;FORMAT BIN 0x00000000 ;ERASE 0xFFF00000 ;erase sector 0 of flash ;ERASE 0xFFF10000 ;erase sector 1 of flash ;ERASE 0xFFF20000 ;erase sector 2 of flash ;ERASE 0xFFF30000 ;erase sector 3 of flash ;ERASE 0xFFF40000 ;erase sector 4 of flash ;ERASE 0xFFF50000 ;erase sector 5 of flash ;ERASE 0xFFF60000 ;erase sector 6 of flash ;ERASE 0xFFF70000 ;erase sector 7 of flash [REGS] DMM1 0xF0000000 ;dBug remaps IPIB to 0xF0000000 FILE /home/vchan_local/bdi2000/reg5200.def