; bdiGDB configuration file for MPC4200 evaluation system
; -------------------------------------------------------
;
; Because of the HRESET bug, a simple loop is flashed to the boot vector.
; Also startup mode STOP is used. The MPC4200 starts executing the loop
; until it is halted by the BDI. Then the BDI processes the init list
; and initializes SDRAM. 
; The boot flash is also mapped to CS0 so it can be reprogrammed. 
; If the boot flash is empty (0xFFFFFFFF), the BDI still gets control over
; the MPC4200 because it loops processing FP exceptions. In this mode, memory
; can be accessed and also the flash can be erased/programmed but executing
; code fails. Therefore, program the endless loop (bootloop.sss) to the flash 
; and reset the system again. This stops the MPC4200 in a healthy state at 
; 0xfff00108 and it is now possible to download and run code.
;
;
[INIT]
; init core register
WREG    MSR             0x00001002      ;MSR  : ME,RI
;
; init SDRAM
WM32    0x80000034      0x00000000      ;SDRAM start
WM32    0x80000038      0x000001ff      ;SDRAM stop (16MB)
WM16    0x80000054      0x0240          ;CSE: enable CS SDRAM
WM32    0x80000108      0x92222700      ;SDRAM config 1
WM32    0x8000010c      0x88b70004      ;SDRAM config 2
WM32    0x80000104      0xd8580000      ;SDRAM control
WM32    0x80000104      0xd8580002      ;SDRAM control
WM32    0x80000104      0xd8580004      ;SDRAM control
WM32    0x80000100      0x008d0000      ;SDRAM mode
WM32    0x80000104      0x58580000      ;SDRAM control
;
; init boot flash for programming
WM32    0x80000004      0x0001ffe0      ;CS0 start = 0xfff00000
WM32    0x80000008      0x0001ffef      ;CS0 stop  = 0xfff7ffff
WM32    0x80000300      0x00047800      ;CS0 ctrl
WM16    0x80000054      0x0041          ;CSE: enable CS0, disable CSBOOT
;
; define maximal transfer size
TSZ4     0xFFF00000      0xFFFFFFFF      ;ROM space


[TARGET]
CPUTYPE     4200        ;the CPU type
JTAGCLOCK   0           ;use 16 MHz JTAG clock
WORKSPACE   0x00000000	;workspace for fast download and cache flush
BOOTADDR    0xfff00100  ;boot address used for start-up break
BDIMODE     AGENT   	;the BDI working mode (LOADONLY | AGENT)
STARTUP     STOP 100    ;STOP mode is used because of the HRESET bug
BREAKMODE   SOFT      	;SOFT or HARD, HARD uses PPC hardware breakpoint
DCACHE      NOFLUSH
;VECTOR      CATCH       ;catch unhandled exceptions
;MEMDELAY    2000        ;additional memory access delay

[HOST]
IP          151.120.25.115
FILE        E:\cygnus\root\usr\demo\mpc4200\fibo.exe
FORMAT      ELF
;FILE        E:\cygnus\root\usr\demo\ppc750\zImage
;FORMAT      BIN 0x100
LOAD        MANUAL      ;load code MANUAL or AUTO after reset

[FLASH]
CHIPTYPE    AM29F       ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE    0x80000     ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000)
BUSWIDTH    8           ;The width of the flash memory bus in bits (8 | 16 | 32)
;FILE        E:\cygnus\root\usr\demo\mpc4200\dbug4200.sss  ;The file to program
FILE        E:\cygnus\root\usr\demo\mpc4200\bootloop.sss  ;The file to program
ERASE       0xFFF00000  ;erase sector 0 of flash
;ERASE       0xFFF10000  ;erase sector 1 of flash
;ERASE       0xFFF20000  ;erase sector 2 of flash
;ERASE       0xFFF30000  ;erase sector 3 of flash
;ERASE       0xFFF40000  ;erase sector 4 of flash
;ERASE       0xFFF50000  ;erase sector 5 of flash
;ERASE       0xFFF60000  ;erase sector 6 of flash
;ERASE       0xFFF70000  ;erase sector 7 of flash


[REGS]
DMM1        0x80000000
FILE        E:\cygnus\root\usr\demo\mpc4200\reg4200.def