; bdigdb configuration file for MPC866ADS board -- Written By Fahd Abidi Ultimate Solutions ; ---------------------------------------------- ; [INIT] ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WSPR 27 0x00001002 ;SRR1 : ME,RI WSPR 638 0xff000000 ;IMMR : internal memory at 0xff000000 WSPR 158 0x00000007 ;ICTRL: ; init SIU register WM32 0xff000000 0x01012440 ;SIUMCR WM32 0xff000004 0xFFFFFF88 ;SYPCR WM16 0xff000200 0x00C2 ;TBSCR WM32 0xff000320 0x55CCAA33 ;RTCSCK: unlock real-time clock status and control register WM16 0xff000220 0x00C2 ;RTCSC WM16 0xff000240 0x0082 ;PISCR WM32 0xff000384 0x55CCAA33 ;PLPRCRK: unlock PLL register WM32 0xff000284 0x006a0000 ;PLPRCR set clock to 25MHz ; init UPMB SUPM 0xff000168 0xFF00017c ;set address for MCR and MDR WUPM 0x00800000 0x012CC04 ;UPMA single read WUPM 0x00800001 0x0FB98C00 WUPM 0x00800002 0x1FF74C45 WUPM 0x00800003 0xFFFFFFFF WUPM 0x00800004 0xFFFFFFFF WUPM 0x00800005 0x1FE77C34 WUPM 0x00800006 0xEFAABC34 WUPM 0x00800007 0x1FA57C35 WUPM 0x00800008 0x0026FC04 ;UPMA burst read WUPM 0x00800009 0x10ADFC00 WUPM 0x0080000A 0xF0AFFC00 WUPM 0x0080000B 0xF1AFFC00 WUPM 0x0080000C 0xEFBBBC00 WUPM 0x0080000D 0x1FF77C45 WUPM 0x0080000E 0xFFFFFFFF WUPM 0x0080000F 0xFFFFFFFF WUPM 0x00800010 0xFFFFFFFF WUPM 0x00800011 0xFFFFFFFF WUPM 0x00800012 0xFFFFFFFF WUPM 0x00800013 0xFFFFFFFF WUPM 0x00800014 0xFFFFFFFF WUPM 0x00800015 0xFFFFFFFF WUPM 0x00800016 0xFFFFFFFF WUPM 0x00800017 0xFFFFFFFF WUPM 0x00800018 0x0E26BC04 ;UPMA single write WUPM 0x00800019 0x01B93C00 WUPM 0x0080001A 0x1FF77C45 WUPM 0x0080001B 0xFFFFFFFF WUPM 0x0080001C 0passedxFFFFFFFF WUPM 0x0080001D 0xFFFFFFFF WUPM 0x0080001E 0xFFFFFFFF WUPM 0x0080001F 0xFFFFFFFF WUPM 0x00800020 0x0E26BC00 ;UPMA burst write WUPM 0x00800021 0x10AD7C00 WUPM 0x00800022 0xF0AFFC00 WUPM 0x00800023 0xF0AFFC00 WUPM 0x00800024 0xE1BBBC04 WUPM 0x00800025 0x1FF77C45 WUPM 0x00800026 0xFFFFFFFF WUPM 0x00800027 0xFFFFFFFF WUPM 0x00800028 0xFFFFFFFF WUPM 0x00800029 0xFFFFFFFF WUPM 0x0080002A 0xFFFFFFFF WUPM 0x0080002B 0xFFFFFFFF WUPM 0x0080002C 0xFFFFFFFF WUPM 0x0080002D 0xFFFFFFFF WUPM 0x0080002E 0xFFFFFFFF WUPM 0x0080002F 0xFFFFFFFF WUPM 0x00800030 0x1FF5FC84 ;UPMA refresh WUPM 0x00800031 0xFFFFFC04 WUPM 0x00800032 0xFFFFFC84 WUPM 0x00800033 0xFFFFFC05 WUPM 0x00800034 0xFFFFFFFF WUPM 0x00800035 0xFFFFFFFF WUPM 0x00800036 0xFFFFFFFF WUPM 0x00800037 0xFFFFFFFF WUPM 0x00800038 0xFFFFFFFF WUPM 0x00800039 0xFFFFFFFF WUPM 0x0080003A 0xFFFFFFFF WUPM 0x0080003B 0xFFFFFFFF WUPM 0x0080003C 0x7FFFFC07 ;UPMA exception WUPM 0x0080003D 0xFFFFFFFF WUPM 0x0080003E 0xFFFFFFFF WUPM 0x0080003F 0xFFFFFFFF ; init memory controller WM32 0xff000104 0xFFE00D34 ;OR0 : 2MB, all accesses, CS early negate, 6ws, time relax WM32 0xff00010C 0xFFFF8110 ;OR1 WM32 0xff000114 0xFFC00800 ;OR2 WM32 0xff000118 0xFFC00800 ;OR3 WM32 0xff000124 0xFFC00A00 ;OR4 - SDRAM set for 50Mhz compatibility init as shown in MPC866ADS-UM page 36 WM32 0xff00012C 0xFFF009A6 ;OR5 WM32 0xff000100 0xFFE00001 ;BR0 WM32 0xff000108 0x02100001 ;BR1 - This was not set correctlly in the old config file WM32 0xff000110 0x00000081 ;BR2 WM32 0xff000110 0x00400088 ;BR3 WM32 0xff000120 0x030000C1 ;BR4 - SDRAM set for 50Mhz compatibility init as shown in MPC866ADS-UM page 36 WM32 0xff000128 0x02000401 ;BR5 WM16 0xff00017A 0x0400 ;MPTPR - divide by 16 WM32 0xff000170 0x60A01114 ;MAMR - based on MB321BT08TASN60 not pupolated WM32 0xff000174 0x80802114 ;MBMR - Set for 32Mhz init as shown in MPC866ADS-UM page 36 WM32 0xff000168 0x00000048 ;MAR - Set acording to MPC866ADS-UM page 60 WM32 0xff00017C 0x80808105 ;MCR - Set acording to MPC866ADS-UM page 60 WM32 0xff000174 0x80802118 ;MBMR - TLFB field changed to 8 acording to MPC866ADS-UM page 60 WM32 0xff00017C 0x80808130 ;MCR - Set acording to MPC866ADS-UM page 60 WM32 0xff000174 0x80802114 ;MBMR - TLFB field changed to 4 acording to MPC866ADS-UM page 60 ; SDRAM is ready to use WM32 0xff000284 0x00500000 ;PLPRCR set clock to 24MHz [TARGET] CPUCLOCK 25000000 ;the CPU clock rate after processing the init list BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoints REGLIST ALL ;select register to transfer to GDB [HOST] IP 151.120.25.119 FILE E:\cygwin\home\bdidemo\mpc860\vxworks ;FILE E:\cygwin\home\bdidemo\mpc860\fibo.exe FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 DUMP E:\temp\dump.bin [FLASH] CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x80000 ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000) WORKSPACE 0xff002000 ;workspace in target DPRAM BUSWIDTH 32 ;The width of the flash memory bus in bits (8 | 16 | 32) FORMAT SREC FILE E:\cygwin\home\bdidemo\mpc860\bootrom.hex ;The file to program ;ERASE 0x02800000 CHIP ;chip erase flash SIMM (MCM29F040) ERASE 0x02800000 ;erase sector 0 of flash SIMM (MCM29F040) ERASE 0x02840000 ;erase sector 1 of flash SIMM ERASE 0x02880000 ;erase sector 2 of flash SIMM ERASE 0x028C0000 ;erase sector 3 of flash SIMM ERASE 0x02900000 ;erase sector 4 of flash SIMM ERASE 0x02940000 ;erase sector 5 of flash SIMM ERASE 0x02980000 ;erase sector 6 of flash SIMM ERASE 0x029C0000 ;erase sector 7 of flash SIMM [REGS] DMM1 0xff000000 FILE E:\cygwin\home\bdidemo\mpc860\reg860.def