; bdiGDB configuration file for LWMON Board [MPC823E @ 66 MHz]
; ------------------------------------------------------------
;
[INIT]
; init core register
WREG	MSR		0x00001002	;MSR  : ME,RI
WSPR	27		0x00001002	;SRR1 : ME,RI
WSPR	149		0x2002000F	;DER  : set debug enable register
;
WSPR	638		0xFFF00000	;IMMR: internal memory at 0xFFF00000

; init SIU register
WM32	0xFFF00004	0xFFFFFF89	;SYPCR: enable bus monitor, disable watchdog

;WM32 0xFFF00284	0x00405000	;PLPRCR: (4+1)*13.2 = 66 MHz

WSPR	796		0x00000000	;M_TWB invalidate TWB

; Init Memory Controller:
;
; BR0/OR0 (Flash Bank 0)
;;WM32	0xFFF00104	0xff800980
;;WM32	0xFFF00100	0x40000001
; BR1/OR1 (Flash Bank 1)
;;WM32	0xFFF0010C	0xff800980
;;WM32	0xFFF00108	0x41000001

[TARGET]
MMU	XLAT	0xC0000000	;support virtual addresses (for Linux!)
PTBASE		0x000000F0	; Page Table Address
REGLIST		STD FPR SPR AUX ; All but SR and BAT

CPUCLOCK	22000000	;the CPU clock rate after processing the init list
BDIMODE		AGENT		;the BDI working mode (LOADONLY | AGENT)
BREAKMODE	HARD		;SOFT or HARD, HARD uses PPC hardware breakpoints

[HOST]
IP		192.168.3.1
FILE		/tftpboot/LWMON/ppcboot.bin
FORMAT		BIN
LOAD		MANUAL		;load code MANUAL or AUTO after reset
DEBUGPORT	2001

[REGS]
DMM1		0xFFF00000
FILE		/tftpboot/reg823.def

[FLASH]
CHIPTYPE	I28BX16 ;Flash type (MT 28F640J3A)
CHIPSIZE	0x800000;The size of one flash chip in bytes
BUSWIDTH	32	;The width of the flash memory bus in bits (8 | 16 | 32)
WORKSPACE	0xFFF02000		; RAM buffer for fast flash programming
FILE		/tftpboot/LWMON/ppcboot.bin	; The file to program
FORMAT		BIN