;;; Atmel AT49BV160 (1M x 16) ;;; CodeItem: ;;; NOP 000003D6 00000000 Setup Peripheral Bus ;;; NOP 00000013 FFE3A000 Setup SDRAM Controller ;;; WDCR 00000010 00000080 Select SDTR1 ;;; WDCR 00000011 0086400D SDTR1: SDRAM Timing Register ;;; WDCR 00000010 00000040 Select MB0CF ;;; WDCR 00000011 00046001 MB0CF: 16MB @ 0x00000000 ;;; WDCR 00000010 00000030 Select RTR ;;; WDCR 00000011 05F00000 RTR: Refresh Timing Register ;;; WDCR 00000010 00000020 Select MCOPT1 ;;; WDCR 00000011 80800000 MCOPT1: Enable SDRAM Controller ;bdiGDB configuration file for esd CPCI405 Board: ; ----------------------------------------------- ; [INIT] ; init core register WSPR 954 0x00000000 ;DCWR: Disable data cache write-thru WSPR 1018 0x00000000 ;DCCR: Disable data cache WSPR 1019 0x00000000 ;ICCR: Disable instruction cache WSPR 982 0x00000000 ;EVPR: Exception Vector Table @0x00000000 ; Setup Peripheral Bus WDCR 18 0x00000010 ;Select PB0AP WDCR 19 0x92015480 ;PB0AP: Flash and SRAM WDCR 18 0x00000000 ;Select PB0CR WDCR 19 0xFFC5A000 ;PB0CR: 2MB at 0xFFE00000, r/w, 16bit ; Setup SDRAM Controller WDCR 16 0x00000080 ;Select SDTR1 WDCR 17 0x0086400D ;SDTR1: SDRAM Timing Register WDCR 16 0x00000040 ;Select MB0CF WDCR 17 0x00046001 ;MB0CF: 16MB @ 0x00000000 ;;WDCR 16 0x00000048 ;Select MB2CF ;;WDCR 17 0x01046001 ;MB2CF: 16MB @ 0x01000000 WDCR 16 0x00000030 ;Select RTR WDCR 17 0x05F00000 ;RTR: Refresh Timing Register ;WDCR 16 0x00000020 ;Select MCOPT1 ;WDCR 17 0x80800000 ;MCOPT1: Enable SDRAM Controller ; Setup MMU info ;WM32 0x000000f4 0x00000000 ;invalidate kernel page table base ;WM32 0x000000f8 0x00000000 ;invalidate process page table base ;WM32 0x000000f0 0xc00000f4 ;invalidate page table base [TARGET] JTAGCLOCK 0 ;use 16 MHz JTAG clock CPUTYPE 405 ;the used target CPU type BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) STARTUP RESET BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint STEPMODE HWBP ;JTAG or HWBP, HWPB uses one or two hardware breakpoints ;VECTOR CATCH ;catch unhandled exceptions MMU XLAT 0xC0000000 ;enable virtual address mode PTBASE 0x000000f0 ;address where kernel/user stores pointer to page table ;SIO 7 9600 ;TCP port for serial IO ;REGLIST SPR ;select register to transfer to GDB ;REGLIST ALL ;select register to transfer to GDB ;SCANPRED 2 2 ;JTAG devices connected before PPC400 ;SCANSUCC 3 3 ;JTAG devices connected after PPC400 [HOST] IP 192.168.3.1 ; Host FILE /tftpboot/cpci405/ppcboot.bin FORMAT BIN LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 DUMP /tftpboot/cpci405/dump.bin ; dump.bin must exist be world writable [FLASH] WORKSPACE 0xFFFFFFFF ;workspace in target RAM for fast programming algorithm CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x10000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) BUSWIDTH 16 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE /tftpboot/cpci405/ppcboot.bin ERASE 0xFFFD0000 ERASE 0xFFFE0000 ERASE 0xFFFF0000 ERASE 0xFFFF8000 ERASE 0xFFFFA000 ERASE 0xFFFFC000 [REGS] IDCR1 0x010 0x011 ;MEMCFGADR and MEMCFGDATA IDCR2 0x012 0x013 ;EBCCFGADR and EBCCFGDATA IDCR3 0x014 0x015 ;KIAR and KIDR FILE reg405gp.def