; *-------------------------------------------------------------------------* ; * file bdiimx31.cfg ; * brief JTAG configuration script for Abatron BDI 2000 and the ; * IMX31 card engine. ; * ; * © Copyright 2006, Logic Product Development, Inc. All Rights Reserved. ; * ; * NOTICE: ; * This file contains source code, ideas, techniques, and information ; * (the Information) which are Proprietary and Confidential Information ; * of Logic Product Development, Inc. This Information may not be used ; * by or disclosed to any third party except under written license, and ; * shall be subject to the limitations prescribed under license. ; * ; *-------------------------------------------------------------------------* ; bdiGDB configuration for ARM IMX31 ; -------------------------------------------------- ; [INIT] WCP15 0x4001 0x00f00000 ;CPACC: allow CP10 and CP11 access WCP10 0x00e8 0x40000000 ;FPEXC: enable VFP11 coprocessor ; [TARGET] CPUTYPE ARM1136 CLOCK 3 ;JTAG clock (0=Adaptive,1=16MHz,2=8MHz,3=4MHz) POWERUP 100 ;start delay after power-up detected in ms WAKEUP 400 ;delay time (ms) after reset deassert ENDIAN LITTLE ;memory model (LITTLE | BIG) VECTOR CATCH 0x1f ;catch D_Abort, P_Abort, SWI, Undef and Reset BREAKMODE HARD ;SOFT or HARD DCC 7 ;DCC I/O via TCP port 7 SCANPRED 2 9 ;no JTAG devices before the ARM1136 SCANSUCC 1 4 ;the ETMBUF after the ARM1136 core [HOST] ;IP 151.120.25.119 ;FILE E:\cygwin\home\demo\arm11\fibo.x ;FORMAT ELF ;LOAD MANUAL ;load file MANUAL or AUTO after reset PROMPT ARM1136> [FLASH] WORKSPACE 0x1FFFC000 ;Workspace in target RAM for fast programming algorithm CHIPTYPE I28BX16 ;Flash type CHIPSIZE 0x200000 ;The size of one flash chip in bytes BUSWIDTH 16 ;The width of the flash memory bus in bits (8 | 16 | 32) ;FILE $arm1136.cfg ;FORMAT BIN 0x00010000 [REGS]