;bdiGDB configuration file for IBM 440GP Reference Board ; ------------------------------------------------------ ; [INIT] ; ; Setup TLB WTLB 0xF0000095 0x1F00003F ;Boot Space 256MB WTLB 0x00000098 0x0000003F ;SDRAM 256MB @ 0x00000000 ; Setup Peripheral Bus WDCR 0x12 0x00000010 ;Select EBC0_B0AP WDCR 0x13 0x9B015480 ;B0AP: Flash and SRAM WDCR 0x12 0x00000000 ;Select EBC0_B0CR WDCR 0x13 0xFFF18000 ;B0CR: 1MB at 0xFFF00000, r/w, 8bit WDCR 0x12 0x00000012 ;Select EBC0_B2AP WDCR 0x13 0x9B015480 ;B2AP: 4 MB Flash WDCR 0x12 0x00000002 ;Select EBC0_B2CR WDCR 0x13 0xff858000 ;B2CR: 4MB at 0xFF800000, r/w, 8bit ; Setup SDRAM Controller (DDR SDRAM) ; single-sided,non-buffered, 12x10(4), 128MB DIMM WDCR 0x10 0x00000082 ;Select SDRAM0_CLKTR WDCR 0x11 0x40000000 ;CLKTR: Advance 90 degrees WDCR 0x10 0x00000080 ;Select SDRAM0_TR0 WDCR 0x11 0x410A4012 ;TR0: V2.0 ;WDCR 0x11 0x41054009 ;TR0: V1.0 WDCR 0x10 0x00000081 ;Select SDRAM0_TR1 WDCR 0x11 0x8080082B ;TR1: V2.0 ;WDCR 0x11 0x40400800 ;TR1: V1.0 WDCR 0x10 0x00000040 ;Select SDRAM0_B0CR WDCR 0x11 0x000A4001 ;B0CR: WDCR 0x10 0x00000030 ;Select SDRAM0_RTR WDCR 0x11 0x08200000 ;RTR: V2.0 ;WDCR 0x11 0x06180000 ;RTR: V1.0 WDCR 0x10 0x00000020 ;Select SDRAM0_CFG0 WDCR 0x11 0x06000000 ;CFG0: 64bit, PMU disable WDCR 0x11 0x86000000 ;CFG0: enable SDRAM [TARGET] JTAGCLOCK 1 ;use 8 MHz JTAG clock CPUTYPE 440 ;the used target CPU type WAKEUP 50 ;wakeup time after reset BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoint STEPMODE JTAG ;JTAG or HWBP, HWBP uses one or two hardware breakpoints VECTOR CATCH ;catch unhandled exceptions ;MMU XLAT 0xC0000000 ;enable virtual address mode ;PTBASE 0x00000000 ;address where kernel/user stores pointer to page table ;SIO 7 9600 ;TCP port for serial IO [HOST] ;IP 151.120.25.118 ;Linux host IP 151.120.25.119 ;Windows host FILE E:\cygwin\home\bdidemo\evb440\fibo.exe ;FILE E:\cygwin\home\bdidemo\evb405\vxWorks FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 DUMP E:\temp\dump.bin ;DUMP dump.bin ;Linux: dump.bin must already exist and public writable [FLASH] ;WORKSPACE 0x00004000 ;workspace in SDRAM for fast programming algorithm WORKSPACE 0xFFF00000 ;workspace in SRAM for fast programming algorithm CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x80000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE E:\cygwin\home\bdidemo\evb440\evb440gp.sss ;The file to program ERASE 0xFFF80000 ;erase sector 0 of flash in U60 (AM29F040) ERASE 0xFFF90000 ;erase sector 1 of flash ERASE 0xFFFA0000 ;erase sector 2 of flash ERASE 0xFFFB0000 ;erase sector 3 of flash ERASE 0xFFFC0000 ;erase sector 4 of flash ERASE 0xFFFD0000 ;erase sector 5 of flash ERASE 0xFFFE0000 ;erase sector 6 of flash ERASE 0xFFFF0000 ;erase sector 7 of flash [REGS] IDCR1 0x010 0x011 ;SDRAM0_CFGADDR and SDRAM0_CFGDATA IDCR2 0x012 0x013 ;EBC0_CFGADDR and EBC0_CFGDATA IDCR3 0x014 0x015 ;EBM0_CFGADDR and EBM0_CFGDATA IDCR4 0x016 0x017 ;PPM0_CFGADDR and PPM0_CFGDATA FILE E:\cygwin\home\bdidemo\evb440\reg440gp.def