; bdiGDB configuration file for EP425 board, debug redboot
; -------------------------------------------
;
[INIT]
;WCP15   0x0001      0x000000f8  ;CTR: set big endian mode
;WCP15   0x2001      0x00000001  ;AUX: Disable Write Buffer Coalescing
;WCP15   0x010F      0x00000001  ;CPA: Enable CP0 access
;
[TARGET]
CPUTYPE         IXP425          ;the target CPU type
JTAGCLOCK       2               ;use 1 MHz JTAG clock
;DBGHANDLER      0x00500000      ;debug handler base address
DBGHANDLER      0xFFFF0800      ;debug handler base address
ENDIAN          BIG             ;memory model (LITTLE | BIG)
BREAKMODE       SOFT            ;SOFT or HARD
;VECTOR          CATCH 0xDE      ;trap all vectors
VECTOR          CATCH 0x1E      ;trap Abort, SWI, Undef
;VTABLO          0xe59ff0f4      ;Use fixed vectors "ldr pc, [pc, #f4]"
VTABLO          0xe59ff018      ;Use fixed vectors "ldr pc, [pc, #24]" (RedBoot)
VTABHI          0xffffffff      ;Do not update relocated vector table

[HOST]
IP              10.0.0.36
FILE            redboot.elf
FORMAT          ELF
LOAD            MANUAL          ;load code code MANUAL or AUTO after reset

[FLASH]
WORKSPACE       0x00001000          ;workspace in target RAM for fast programming algorithm
CHIPTYPE        STRATAX16           ;Flash type
CHIPSIZE        0x01000000          ;The size of one flash chip in bytes
BUSWIDTH        16                  ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE            redboot.bin
FORMAT          BIN 0x50000000
ERASE           0x50000000  ;erase sector 0
ERASE           0x50020000  ;erase sector 1
ERASE           0x50040000  ;erase sector 2
ERASE           0x50060000  ;erase sector 3

[REGS]
FILE	        defs\regIXP425.def