; CLLF BW31, credit cards ; ----------------------- ;written by Steven Blakeslee 2002 ; [INIT] ; init core register WSPR 638 0xfa200000 ;;IMMR: internal memory at 0xFA200000 ; ; init SIU register WM32 0xFA200004 0xffff0689 ;;SYPCR: enable bus monitor, disable software watchdog WM32 0xFA200280 0x62000000 ;;SCCR: disable clock output WM32 0xFA200284 0x0050d000 ;;PLPRCR: clear flags ; ; init UPM SUPM 0xFA200168 0xFA20017C ;Set address for MCR and MDR ; WUPM 0x00000000 0xcfffcc24 ;UPM: singel read WUPM 0x00000001 0x0fffcc04 ;UPM: singel read WUPM 0x00000002 0x0cafcc04 ;UPM: singel read WUPM 0x00000003 0x03afcc08 ;UPM: singel read WUPM 0x00000004 0x3fbfcc27 ;UPM: singel read WUPM 0x00000005 0xffffcc25 ;UPM: singel read WUPM 0x00000006 0xffffcc25 ;UPM: singel read WUPM 0x00000007 0xffffcc25 ;UPM: singel read ; WUPM 0x00000008 0xcfffcc24 ;UPMA burst read WUPM 0x00000009 0x0fffcc04 ;UPMA burst read WUPM 0x0000000A 0x0cafcc84 ;UPMA burst read WUPM 0x0000000B 0x03afcc88 ;UPMA burst read WUPM 0x0000000C 0x3fbfcc27 ;UPMA burst read WUPM 0x0000000D 0xffffcc25 ;UPMA burst read WUPM 0x0000000E 0xffffcc25 ;UPMA burst read WUPM 0x0000000F 0xffffcc25 ;UPMA burst read WUPM 0x00000010 0xffffcc25 ;UPMA burst read WUPM 0x00000011 0xffffcc25 ;UPMA burst read WUPM 0x00000012 0xffffcc25 ;UPMA burst read WUPM 0x00000013 0xffffcc25 ;UPMA burst read WUPM 0x00000014 0xffffcc25 ;UPMA burst read WUPM 0x00000015 0xffffcc25 ;UPMA burst read WUPM 0x00000016 0xffffcc25 ;UPMA burst read WUPM 0x00000017 0xffffcc25 ;UPMA burst read ; WUPM 0x00000018 0xcfffcc24 ;UPMA single write WUPM 0x00000019 0x0fffcc04 ;UPMA single write WUPM 0x0000001A 0x0cffcc04 ;UPMA single write WUPM 0x0000001B 0x03ffcc08 ;UPMA single write WUPM 0x0000001C 0x3fffcc27 ;UPMA single write WUPM 0x0000001D 0xffffcc25 ;UPMA single write WUPM 0x0000001E 0xffffcc25 ;UPMA single write WUPM 0x0000001F 0xffffcc25 ;UPMA single write ; WUPM 0x00000020 0xcfffcc24 ;UPMA burst write WUPM 0x00000021 0x0fffcc04 ;UPMA burst write WUPM 0x00000022 0x0cffcc80 ;UPMA burst write WUPM 0x00000023 0x03ffcc8C ;UPMA burst write WUPM 0x00000024 0x0cffcc00 ;UPMA burst write WUPM 0x00000025 0x33ffcc27 ;UPMA burst write WUPM 0x00000026 0xffffcc25 ;UPMA burst write WUPM 0x00000027 0xffffcc25 ;UPMA burst write WUPM 0x00000028 0xffffcc25 ;UPMA burst write WUPM 0x00000029 0xffffcc25 ;UPMA burst write WUPM 0x0000002A 0xffffcc25 ;UPMA burst write WUPM 0x0000002B 0xffffcc25 ;UPMA burst write WUPM 0x0000002C 0xffffcc25 ;UPMA burst write WUPM 0x0000002D 0xffffcc25 ;UPMA burst write WUPM 0x0000002E 0xffffcc25 ;UPMA burst write WUPM 0x0000002F 0xffffcc25 ;UPMA burst write ; WUPM 0x00000030 0xc0ffcc24 ;UPMA refresh WUPM 0x00000031 0x03ffcc24 ;UPMA refresh WUPM 0x00000032 0x0fffcc24 ;UPMA refresh WUPM 0x00000033 0x0fffcc24 ;UPMA refresh WUPM 0x00000034 0x3fffcc27 ;UPMA refresh WUPM 0x00000035 0xffffcc25 ;UPMA refresh WUPM 0x00000036 0xffffcc25 ;UPMA refresh WUPM 0x00000037 0xffffcc25 ;UPMA refresh WUPM 0x00000038 0xffffcc25 ;UPMA refresh WUPM 0x00000039 0xffffcc25 ;UPMA refresh WUPM 0x0000003A 0xffffcc25 ;UPMA refresh WUPM 0x0000003B 0xffffcc25 ;UPMA refresh ; WUPM 0x0000003C 0xffffcc25 ;UPMA exception WUPM 0x0000003D 0xffffcc25 ;UPMA exception WUPM 0x0000003E 0xffffcc25 ;UPMA exception WUPM 0x0000003F 0xffffcc25 ;UPMA exception ; ; init memory controller WM32 0xFA200104 0xff800140 ;;OR0: Flash 2MB, all accesses, CS early negate, 4ws WM32 0xFA200100 0xfe000001 ;;BR0: Flash at 0xFE000000, 32bit, R/W, no parity, use GPCM WM32 0xFA20010C 0xff000e00 ;;OR1: DRAM 4MB, all accesses WM32 0xFA200108 0x00000081 ;;BR1: DRAM at 0x00000000, 32bit, R/W, no parity, use UPMA WM32 0xfa20011c 0xff7f8910 ;;OR3 WM32 0xfa200118 0xfa400001 ;;BR3 BCSR WM32 0xFA200124 0xffff8970 ;;OR4: NVRAM WM32 0xFA200120 0xfa000401 ;;BR4: NVRAM ; WM16 0xFA20017A 0x0800 ;;MPTPR : divide by 32 WM32 0xFA200170 0x5fa01430 ;;MAMR : PTA=24 (15.36us @ 50MHz) ; [TARGET] CPUCLOCK 50000000 ;the CPU clock rate after processing the init list WORKSPACE 0x00000000 ;workspace in target RAM for fast download BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoints ; [HOST] IP 10.0.0.161 FILE PCL200.mot FORMAT SREC LOAD MANUAL ;load code MANUAL or AUTO after reset ; [REGS] DMM1 0xFA200000 FILE reg860.def