;EP8280 64M of psdram config script
;----------------------------------
;written by Greg Davis
;based on the DES0193_10 Raven script written by Price David
;
;
[INIT]
;
;*************************************************************
;  program the SYPCR - disable the watchdog timer
;*************************************************************
WM32	0x10004		0xffff06c1
;
;*************************************************************
;  program the bcr - Bus cfg reg
;*************************************************************
WM32	0x10024 	0x80908000
;
;*************************************************************
;  program the SIUMCR -
;*************************************************************
WM32	0x10000 	0x02610000
;
;*************************************************************
;  program the SCCR - disable PCI mode & set clock divider to 16
;*************************************************************
WM32	0x10c80 	0x00000001
;
;*************************************************************
;  load IMMR register with the new base address (0x04700000)
;  Warning: this assumes that the IMMR is located at 0xf0101A8
;  due to the reset configuration.  If the reset config words
;  in boot Flash/ROM are set for a different address, then you
;  must update this script to use the new IMMR address!
;*************************************************************
WM32	0x101A8 	0xf0000000
;
;*************************************************************
;  initialize the memory controller registers...
;*************************************************************
;
;*************************************************************
;  initialize - FLASH BR0 & OR0
;*************************************************************
;WM32	0xf0010100 	0xff001801
;WM32 	0xf0010104 	0xff0000f0
;
;*************************************************************
;  initialize - PSDRAM  BR1 & OR1 (64 Mbyte)
;*************************************************************
WM32	0xf0010108 	0x00000041
WM32	0xf001010c 	0xfc002cc0
;
;*************************************************************
;  initialize - BCSR BR4 & OR4
;*************************************************************
WM32	0xf0010120 	0xfa001001
WM32 	0xf0010124 	0xfff000f0
;
;*************************************************************
;  program the MPTPR -  
;*************************************************************
WM16 	0xf0010184 	0x0A00
;
;*************************************************************
;  SDRAM Initialization
;*************************************************************
;wait 100us before accessing
;
;*************************************************************
;  initialize  - PSDRAM mode reg (PSDMR) 
;
;*************************************************************
WM32 	0xf0010190	0xc34e2462
;
;*************************************************************
;  program PSRT - PSDRAM refresh timer 
;
;*************************************************************
WM8 	0xf001019C 	0x64
;
;*************************************************************
;  SDRAM Initialization
;*************************************************************
;wait 100us before accessing
;
;Precharge all banks           SMMR[OP]=101
WM8 	0xf0010190 	0xeb
WM8 	0x00000110	0xff
;
;Issue 8 CBR_Refresh commands  SMMR[OP]=001
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0xf0010190 	0xcb
WM8 	0x00000110	0xff
;
;Issue Mode set command        SMMR[OP]=011
WM8 	0xf0010190  	0xdb
WM8 	0x00000110	0xff
;
;set PSDMR for normal operation
WM8 	0xf0010190 	0xc3
;
;clear MRS
WREG	MSR 		0x00000000
;
;
[TARGET]
CPUTYPE     8240        ;the CPU type (603EV,750,8240,8260)
JTAGCLOCK   0           ;use 16 MHz JTAG clock
;WORKSPACE   0x00000000	;workspace in target RAM for fast download
BDIMODE     AGENT     	;the BDI working mode (LOADONLY | AGENT | GATEWAY)
BREAKMODE   SOFT      	;SOFT or HARD, HARD uses PPC hardware breakpoints
VECTOR      CATCH       ;catch unhandled exceptions
DCACHE      NOFLUSH	;data cache flushing (FLUSH | NOFLUSH)
;
;
;Not really using this
;
[FLASH]
;CHIPTYPE    AM29F       ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
;CHIPSIZE    0x200000    ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000)
;BUSWIDTH    8           ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
;
;
[HOST]
IP      10.0.0.175
FILE    pcl82xxram.ep
FORMAT  SREC
START   0x80020         ;only needed for RAM booloader
LOAD    MANUAL          ;load code MANUAL or AUTO after reset
;
;
[REGS]
DMM1    0xF0000000
FILE    defs/reg8260.def