; bdiGDB configuration for CSB735 - Freescale MC9328MX21
; ----------------------------------------------------------
;
[INIT]
WCP15   0x010F      0x00002001  ;Enable CP0 and CP13 access
;
; setup the AHB IP Bus so we can get at all registers
WM32 0x10000000 0x00040304
WM32 0x10020000 0x3FFC0000
WM32 0x10000004 0xFFFBFCFB
WM32 0x10020004 0xFFFFFFFF

delay 1000

; Initialize clocks
; SYSCLK = FCLK = 266Mhz
; BCLK and HCLK = MPLL_CLK/4 = 64Mhz
; enable the PLL's
WM32 	0x10027000 	0x07000E0F
DELAY	500

; write the peripheral clock dividers (MPLL_CLK = 266Mhz)
; PCLK_DIV4 = /4, PCLK_DIV3 = /4, PCLK_DIV2 = /11 (21.3Mhz), PCLK_DIV1 = /16 (16Mhz)
WM32 	0x1002701c 	0x03030B0F
DELAY	500

; set CLKO to PERCLK1
WM32 0x10027028 0x0000000A

; Speed up Chip select CS0
WM32 0xDF001000 0x00000f00


; init SDRAM 16Mx16x2, 13 row, 9 col
; IAM=0 CS2 CL3
; Set precharge all command
WM32 0xDF000000 0x9212C300
RM32 0xDF000000

; Issue precharge all command
WM32 0xC0000000

; Set AutoRefresh Command
WM32 0xDF000000 0xA212C300
RM32 0xDF000000

; Issue AutoRefresh Command
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000
RM32 0xC0000000

; Set Mode Register
WM32 0xDF000000 0xB212C308
RM32 0xDF000000

; Issue Mode Register Command
WM32 0xC0119800

; Set to Normal Mode and enable refresh
WM32 0xDF000000 0x8212C300
RM32 0xDF000000

RM32 0xC0112420


[TARGET]
CPUTYPE     ARM926E
CLOCK       3 8	  	;JTAG clock (0=Adaptive, 1=8MHz, 2=4MHz, 3=2MHz)
STARTUP		RESET
WAKEUP		2000
RESET		HARD 500
ENDIAN      LITTLE		;memory model (LITTLE | BIG)
;VECTOR      CATCH
BREAKMODE   HARD		;SOFT or HARD, ARM / Thumb break code

[HOST]
IP          192.168.254.19
FILE        c:\umon_v1.14\umon_ports\csb735\build_csb735\ramtst.elf
FORMAT      ELF
LOAD        MANUAL      	;load code MANUAL or AUTO after reset
PROMPT		BDI_CSB735>
TELNET		NOECHO

[FLASH]
WORKSPACE	0xC0000000
CHIPTYPE    MIRRORX16           ;Flash type
CHIPSIZE   	0x4000000           ;The size of one flash chip in bytes - 64M
BUSWIDTH   	16                  ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE       	C:\umon_v1.14\umon_ports\csb735\build_csb735\boot.bin
FORMAT     	BIN 0xC8000000
ERASE      	0xC8000000
ERASE	   	0XC8020000
ERASE	   	0XC8040000
ERASE	   	0XC8080000

[REGS]
FILE    	c:\abatron\new_arm7_9\reg926e.def