; bdiGDB configuration file for Marvel PXA270 Board ; ------------------------------------------ ; [INIT] WCP15 0x010F 0x00002001 ;Enable CP0 and CP13 access ; setup memory controller WM32 0x48000008 0x00004ae8 ;MSC0 ;WM32 0x4800000C 0x00000000 ;MSC1 ;WM32 0x48000010 0x2fec0000 ;MSC2 ;WM32 0x48000014 0x00000001 ;MECR WM32 0x48000004 0x03ca4fff ;MDREFR : chip default WM32 0x48000004 0x03ca4030 ;MDREFR : WM32 0x48000004 0x03cb6030 ;MDREFR : WM32 0x48000004 0x038b6030 ;MDREFR : WM32 0x48000004 0x038be030 ;MDREFR : WM32 0x48000000 0x09c819c8 ;MDCNFG : DELAY 20 WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0xA0000000 0xA0000000 ;access SDRAM WM32 0x48000000 0x09c819c9 ;MDCNFG : WM32 0x48000040 0x00220022 ;MDMRS : WM32 0x48000004 0x0109c030 ;MDREFR : [TARGET] CPUTYPE PXA270 ;the target CPU type JTAGCLOCK 0 ;use 16 MHz JTAG clock POWERUP 2000 ;start delay after power-up detected in ms DBGHANDLER 0xFFFF0800 ;debug handler base address ;DBGHANDLER 0x00000000 ;debug handler base address ;DBGHANDLER 0x01FEF800 ;debug handler base address ;DBGHANDLER 0xFE000800 ;debug handler base address VECTOR CATCH 0x1E ENDIAN LITTLE ;memory model (LITTLE | BIG) BREAKMODE SOFT ;SOFT or HARD WAKEUP 1000 [HOST] IP 192.168.254.19 FILE C:\umon_v1.14\umon_ports\csb726\build_csb726\ramtst.elf FORMAT ELF LOAD MANUAL ;load code code MANUAL or AUTO after reset PROMPT CSB726_BDI> TELNET NOECHO [FLASH] ;WORKSPACE 0x5C000000 ;workspace in internal SRAM WORKSPACE 0xa0020000 ;workspace in external SDRAM CHIPTYPE MIRRORX16 ;Flash type CHIPSIZE 0x4000000 ;The size of one flash chip in bytes - 64Mbytes BUSWIDTH 16 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE D:\tmp\wince_schema\csb726_p5\boot.nb0 ;FILE D:\tmp\wince_schema\ce6\csb726_p5\boot.nb0 ;FILE D:\tmp\wince_schema\ce6\csb726_p5_wvga\boot.nb0 ;FILE D:\tmp\wince_schema\deka\boot.nb0 ;FILE C:\umon_v1.14\umon_ports\csb726\build_csb726\boot.bin FORMAT BIN 0x00000000 ERASE 0x00000000 ERASE 0x00020000 ERASE 0x00040000 ERASE 0x00060000 [REGS] FILE $regPXA270.def