; This configuration uses the monitor to setup the board
;
[INIT]
;
; Invalidate Caches
;#0 IVIC                            ;Invalidate IC
;#0 IVDC                            ;Invalidate DC
;
; Setup TLB
;#0 WTLB    0xC000000000000600   0x00000017  ;Map 0xc000... -> 0x0000...
#0 WCP0 12					0x004000e4	; enable access to 64-bit segmet

#0 WM64 0x8001180080000018  0x0000000000E60001 
#0 WM64 0x8001180080000018  0x0000000000E60101 
#0 WM64 0x8001180080000008  0x00000000288C848C 
#0 WM64 0x8001180080000010  0x000000008C60C490 
#0 WM64 0x8001180080000028  0x00000000F060F020 
#0 WM64 0x8001180080000020  0x0000000000000000 
#0 WM64 0x8001180080000030  0x00000000FFFFFFFF
#0 WM64 0x8001180080000038  0x0000000000000000 
#0 WM64 0x8001180080000040  0x0000000000000000 
#0 WM64 0x8001180080000000  0x000000002002088A 
#0 WM64 0x8001180080000000  0x000000002002088B ; l2c_cfg
#0 WM64 0x8001180000000000  0x0000000080bf1f40 ; mio_boot_reg_cfg0
;#0 WM64 0x80011800000800E9  0x00000000802043F0

[TARGET]
; common parameters
POWERUP     2000       ;power-up delay 2 seconds
JTAGCLOCK   0          ;use 32 MHz JTAG clock
;JTAGCLOCK   1          ;use 16 MHz JTAG clock
;JTAGCLOCK   2          ;use 11 MHz JTAG clock


; Core#0 parameters (active core after reset)
#0 CPUTYPE     CNMIPS           ;the used target CPU type
#0 ENDIAN      BIG              ;target is big endian
#0 JTAGDELAY   5                ;40 TCK's access delay
;#0 STARTUP     STOP 5000        ;STOP mode is used to let the monitor init the system
#0 STARTUP     HALT             ;halt at the boot vector
;#0 WORKSPACE   0xA0000080       ;workspace in target RAM for fast download
#0 BREAKMODE   HARD             ;SOFT or HARD
#0 SCANPRED    15 75           ;select last core in scan chain
#0 SCANSUCC    0   0
;
; Core#1 parameters
#1 CPUTYPE     CNMIPS
#1 ENDIAN      BIG
#1 JTAGDELAY   5
#1 STARTUP     WAIT             ;CPU is held in reset
#1 BREAKMODE   HARD
#1 SCANPRED    14  70
#1 SCANSUCC    1   5
;
;======================================================

[FLASH]
CHIPTYPE AM29BX8
BUSWIDTH 8
CHIPSIZE 0x80000
[HOST]

#0  PROMPT  cnMIPS#0>
#1  PROMPT  cnMIPS#1>


[REGS]
;#FILE cnmips.def ; Relative to tftpboot location
FILE cn58xxp1-abatron-csrs.def
;FILE cn56xx-abatron-csrs.def ; Relative to tftpboot location