;Register definition for MCF5282
;===============================
;
; name: user defined name of the register
; type: the type of the register
;	DREG	data register
;	AREG	address register
;	CREG	control register
;	MM	memory mapped register
;	DMMx	direct memory mapped register with offset
;		x = 1..4
;		the base is defined in the configuration file
;		e.g. DMM1 0x02200000
; addr:	the number, adddress or offset of the register
; size	the size of the register (8,16 or 32)
;
;name		type	addr		size
;-------------------------------------------
;
; Additional Control Register
;
other_a7        CREG    0x800           32
macsr           CREG    0x804           8
mask            CREG    0x805           16
acc0            CREG    0x806           16
accext01        CREG    0x807           16
accext23        CREG    0x808           16
acc1            CREG    0x809           16
acc2            CREG    0x80a           16
acc3            CREG    0x80b           16
rambar          CREG    0xc05           32
;
;
;
; DMM1 must be set to the internal memory base address
;
;       SCM Registers
ipsbar          DMM1	0x000		32
srambar       	DMM1	0x008		32
crsr   		DMM1	0x010		8
cwcr   		DMM1	0x011		8
lpicr  		DMM1	0x012		8
cwsr   		DMM1	0x013		8
mpark  		DMM1	0x01C		32
mpr    		DMM1	0x020		32
pacr0  		DMM1	0x024		8
pacr1  		DMM1	0x025		8
pacr2  		DMM1	0x026		8
pacr3  		DMM1	0x027		8
pacr4  		DMM1	0x028		8
pacr5  		DMM1	0x02A		8
pacr6  		DMM1	0x02B		8
pacr7  		DMM1	0x02C		8
pacr8  		DMM1	0x02E		8
gpacr0 		DMM1	0x030		8
;
;       SDRAMC Registers
dcr             DMM1	0x040		16
dacr0           DMM1	0x048		32
dmr0            DMM1	0x04C		32
dacr1           DMM1	0x050		32
dmr1            DMM1	0x054		32
;
;       Chip Select Registers
csar0           DMM1	0x080		16
csmr0           DMM1	0x084		32
cscr0           DMM1	0x08A		16
csar1           DMM1	0x08C		16
csmr1           DMM1	0x090		32
cscr1           DMM1	0x096		16
csar2           DMM1	0x098		16
csmr2           DMM1	0x09C		32
cscr2           DMM1	0x0A2		16
csar3           DMM1	0x0A4		16
csmr3           DMM1	0x0A8		32
cscr3           DMM1	0x0AE		16
csar4           DMM1	0x0B0		16
csmr4           DMM1	0x0B4		32
cscr4           DMM1	0x0BA		16
csar5           DMM1	0x0BC		16
csmr5           DMM1	0x0C0		32
cscr5           DMM1	0x0C6		16
csar6           DMM1	0x0C8		16
csmr6           DMM1	0x0CC		32
cscr6           DMM1	0x0D2		16
csar7           DMM1	0x0D4		16
csmr7           DMM1	0x0D8		32
cscr7           DMM1	0x0DE		16
;
;       DMA Registers
sar0            DMM1	0x100		32
dar0            DMM1	0x104		32
dsr0            DMM1	0x108		 8
bcr01           DMM1	0x108		32
dcr0            DMM1	0x10c		32
sar1            DMM1	0x110		32
dar1            DMM1	0x114		32
dsr1            DMM1	0x118		 8
bcr11           DMM1	0x118		32
dcr1            DMM1	0x11c		32
sar2            DMM1	0x120		32
dar2            DMM1	0x124		32
dsr2            DMM1	0x128		 8
bcr21           DMM1	0x128		32
dcr2            DMM1	0x12c		32
sar3            DMM1	0x130		32
dar3            DMM1	0x134		32
dsr3            DMM1	0x138		 8
bcr31           DMM1	0x138		32
dcr3            DMM1	0x13c		32
;
;       I2C Registers
i2adr           DMM1	0x300		8
i2fdr           DMM1	0x304		8
i2cr            DMM1	0x308		8
i2sr            DMM1	0x30C		8
i2dr            DMM1	0x310		8
;
;       QSPI Registers
qmr             DMM1	0x340		16
qdlyr           DMM1	0x344		16
qwr             DMM1	0x348		16
qir             DMM1	0x34C		16
qar             DMM1	0x350		16
qdr             DMM1	0x354		16
;
;       DMA Timer Registers
dtmr0           DMM1	0x400		16
dtxmr0          DMM1	0x402		8
dter0           DMM1	0x403		8
dtrr0           DMM1	0x404		32
dtcr0           DMM1	0x408		32
dtcn0           DMM1	0x40C		32
dtmr1           DMM1	0x440		16
dtxmr1          DMM1	0x442		8
dter1           DMM1	0x443		8
dtrr1           DMM1	0x444		32
dtcr1           DMM1	0x448		32
dtcn1           DMM1	0x44C		32
dtmr2           DMM1	0x480		16
dtxmr2          DMM1	0x482		8
dter2           DMM1	0x483		8
dtrr2           DMM1	0x484		32
dtcr2           DMM1	0x488		32
dtcn2           DMM1	0x48C		32
dtmr3           DMM1	0x4C0		16
dtxmr3          DMM1	0x4C2		8
dter3           DMM1	0x4C3		8
dtrr3           DMM1	0x4C4		32
dtcr3           DMM1	0x4C8		32
dtcn3           DMM1	0x4CC		32
;
;       Interrupt Controller 0
iprh0           DMM1	0xC00		32
iprl0           DMM1	0xC04		32
imrh0           DMM1	0xC08		32
imrl0           DMM1	0xC0C		32
intfrch0        DMM1	0xC10		32
intfrcl0        DMM1	0xC14		32
ilrr0           DMM1	0xC18		8
iacklpr0        DMM1	0XC19		8
;
icr001          DMM1	0xC41           8
icr002          DMM1	0xC42           8
icr003          DMM1	0xC43           8
icr004          DMM1	0xC44           8
icr005          DMM1	0xC45           8
icr006          DMM1	0xC46           8
icr007          DMM1	0xC47           8
icr008          DMM1	0xC48           8
icr009          DMM1	0xC49           8
icr010          DMM1	0xC4A           8
icr011          DMM1	0xC4B           8
icr012          DMM1	0xC4C           8
icr013          DMM1	0xC4D           8
icr014          DMM1	0xC4E           8
icr015          DMM1	0xC4F           8
icr016          DMM1	0xC50           8 
icr017          DMM1	0xC51           8
icr018          DMM1	0xC52           8
icr019          DMM1	0xC53           8
icr020          DMM1	0xC54           8
icr021          DMM1	0xC55           8
icr022          DMM1	0xC56           8
icr023          DMM1	0xC57           8
icr024          DMM1	0xC58           8
icr025          DMM1	0xC59           8
icr026          DMM1	0xC5A           8
icr027          DMM1	0xC5B           8
icr028          DMM1	0xC5C           8
icr029          DMM1	0xC5D           8
icr030          DMM1	0xC5E           8
icr031          DMM1	0xC5F           8
icr032          DMM1	0xC60           8
icr033          DMM1	0xC61           8
icr034          DMM1	0xC62           8
icr035          DMM1	0xC63           8
icr036          DMM1	0xC64           8
icr037          DMM1	0xC65           8
icr038          DMM1	0xC66           8
icr039          DMM1	0xC67           8
icr040          DMM1	0xC68           8
icr041          DMM1	0xC69           8
icr042          DMM1	0xC6A           8
icr043          DMM1	0xC6B           8
icr044          DMM1	0xC6C           8
icr045          DMM1	0xC6D           8
icr046          DMM1	0xC6E           8
icr047          DMM1	0xC6F           8
icr048          DMM1	0xC70           8
icr049          DMM1	0xC71           8
icr050          DMM1	0xC72           8
icr051          DMM1	0xC73           8
icr052          DMM1	0xC74           8
icr053          DMM1	0xC75           8
icr054          DMM1	0xC76           8
icr055          DMM1	0xC77           8
icr056          DMM1	0xC78           8
icr057          DMM1	0xC79           8
icr058          DMM1	0xC7A           8
icr059          DMM1	0xC7B           8
icr060          DMM1	0xC7C           8
icr061          DMM1	0xC7D           8
icr062          DMM1	0xC7E           8
icr063          DMM1	0xC7F           8
;
;swackr0         DMM1	0xCE0           8
;l1iackr0        DMM1	0xCE4           8
;l2iackr0        DMM1	0xCE8           8
;l3iackr0        DMM1	0xCEC           8
;l4iackr0        DMM1	0xCF0           8
;l5iackr0        DMM1	0xCF4           8
;l6iackr0        DMM1	0xCF8           8
;l7iackr0        DMM1	0xCFC           8
;
;       Interrupt Controller 1
iprh1           DMM1	0xD00	        32
iprl1           DMM1	0xD04	        32
imrh1           DMM1	0xD08	        32
imrl1           DMM1	0xD0C	        32
intfrch1        DMM1	0xD10	        32
intfrcl1        DMM1	0xD14	        32
ilrr1           DMM1	0xD18	        8
iacklpr1        DMM1	0xD19	        8
;
icr101          DMM1	0xD41           8
icr102          DMM1	0xD42           8
icr103          DMM1	0xD43           8
icr104          DMM1	0xD44           8
icr105          DMM1	0xD45           8
icr106          DMM1	0xD46           8
icr107          DMM1	0xD47           8
icr108          DMM1	0xD48           8
icr109          DMM1	0xD49           8
icr110          DMM1	0xD4A           8
icr111          DMM1	0xD4B           8
icr112          DMM1	0xD4C           8
icr113          DMM1	0xD4D           8
icr114          DMM1	0xD4E           8
icr115          DMM1	0xD4F           8
icr116          DMM1	0xD50           8
icr117          DMM1	0xD51           8
icr118          DMM1	0xD52           8
icr119          DMM1	0xD53           8
icr120          DMM1	0xD54           8
icr121          DMM1	0xD55           8
icr122          DMM1	0xD56           8
icr123          DMM1	0xD57           8
icr124          DMM1	0xD58           8
icr125          DMM1	0xD59           8
icr126          DMM1	0xD5A           8
icr127          DMM1	0xD5B           8
icr128          DMM1	0xD5C           8
icr129          DMM1	0xD5D           8
icr130          DMM1	0xD5E           8
icr131          DMM1	0xD5F           8
icr132          DMM1	0xD60           8
icr133          DMM1	0xD61           8
icr134          DMM1	0xD62           8
icr135          DMM1	0xD63           8
icr136          DMM1	0xD64           8
icr137          DMM1	0xD65           8
icr138          DMM1	0xD66           8
icr139          DMM1	0xD67           8
icr140          DMM1	0xD68           8
icr141          DMM1	0xD69           8
icr142          DMM1	0xD6A           8
icr143          DMM1	0xD6B           8
icr144          DMM1	0xD6C           8
icr145          DMM1	0xD6D           8
icr146          DMM1	0xD6E           8
icr147          DMM1	0xD6F           8
icr148          DMM1	0xD70           8
icr149          DMM1	0xD71           8
icr150          DMM1	0xD72           8
icr151          DMM1	0xD73           8
icr152          DMM1	0xD74           8
icr153          DMM1	0xD75           8
icr154          DMM1	0xD76           8
icr155          DMM1	0xD77           8
icr156          DMM1	0xD78           8
icr157          DMM1	0xD79           8
icr158          DMM1	0xD7A           8
icr159          DMM1	0xD7B           8
icr160          DMM1	0xD7C           8
icr161          DMM1	0xD7D           8
icr162          DMM1	0xD7E           8
icr163          DMM1	0xD7F           8
;
;swackr1         DMM1	0xDE0           8
;l1iackr1        DMM1	0xDE4           8
;l2iackr1        DMM1	0xDE8           8
;l3iackr1        DMM1	0xDEC           8
;l4iackr1        DMM1	0xDF0           8
;l5iackr1        DMM1	0xDF4           8
;l6iackr1        DMM1	0xDF8           8
;l7iackr1        DMM1	0xDFC           8
;
;       Global Interrupt Acknowledge Cycle Registers
;gswackr         DMM1	0xFE0	        8
;gl1iackr        DMM1	0xFE4	        8
;gl2iackr        DMM1	0xFE8	        8
;gl3iackr        DMM1	0xFEC	        8
;gl4iackr        DMM1	0xFF0	        8
;gl5iackr        DMM1	0xFF4	        8
;gl6iackr        DMM1	0xFF8	        8
;gl7iackr        DMM1	0xFFC	        8
;
;       FEC Registers
eir             DMM1	0x1004	        32
eimr            DMM1	0x1008	        32
rdar            DMM1	0x1010	        32
tdar            DMM1	0x1014	        32
ecr             DMM1	0x1024	        32
mdata           DMM1	0x1040	        32
mscr            DMM1	0x1044	        32
mibc            DMM1	0x1064	        32
rcr             DMM1	0x1084	        32
tcr             DMM1	0x10C4	        32
palr            DMM1	0x10E4	        32
paur            DMM1	0x10E8	        32
opd             DMM1	0x10EC	        32
iaur            DMM1	0x1118	        32
ialr            DMM1	0x111C	        32
gaur            DMM1	0x1120	        32
galr            DMM1	0x1124	        32
tfwr            DMM1	0x1144	        32
frbr            DMM1	0x114C	        32
frsr            DMM1	0x1150	        32
erdsr           DMM1	0x1180	        32
etdsr           DMM1	0x1184	        32
emrbr           DMM1	0x1188	        32
;
;       GPIO Registers
porta           DMM1	0x100000	8
portb           DMM1	0x100001	8
portc           DMM1	0x100002	8
portd           DMM1	0x100003	8
porte           DMM1	0x100004	8
portf           DMM1	0x100005	8
portg           DMM1	0x100006	8
porth           DMM1	0x100007	8
portj           DMM1	0x100008	8
portdd          DMM1	0x100009	8
porteh          DMM1	0x10000A	8
portel          DMM1	0x10000B	8
portas          DMM1	0x10000C	8
portqs          DMM1	0x10000D	8
portsd          DMM1	0x10000E	8
porttc          DMM1	0x10000F	8
porttd          DMM1	0x100010	8
portua          DMM1	0x100011	8
ddra            DMM1	0x100014	8
ddrb            DMM1	0x100015	8
ddrc            DMM1	0x100016	8
ddrd            DMM1	0x100017	8
ddre            DMM1	0x100018	8
ddrf            DMM1	0x100019	8
ddrg            DMM1	0x10001A	8
ddrh            DMM1	0x10001B	8
ddrj            DMM1	0x10001C	8
ddrdd           DMM1	0x10001D	8
ddreh           DMM1	0x10001E	8
ddrel           DMM1	0x10001F	8
ddras           DMM1	0x100020	8
ddrqs           DMM1	0x100021	8
ddrsd           DMM1	0x100022	8
ddrtc           DMM1	0x100023	8
ddrtd           DMM1	0x100024	8
ddrua           DMM1	0x100025	8
portap          DMM1	0x100028	8
portbp          DMM1	0x100029	8
portcp          DMM1	0x10002A	8
portdp          DMM1	0x10002B	8
portep          DMM1	0x10002C	8
portfp          DMM1	0x10002D	8
portgp          DMM1	0x10002E	8
porthp          DMM1	0x10002F	8
portjp          DMM1	0x100030	8
portddp         DMM1	0x100031	8
portehp         DMM1	0x100032	8
portelp         DMM1	0x100033	8
portasp         DMM1	0x100034	8
portqsp         DMM1	0x100035	8
portsdp         DMM1	0x100036	8
porttcp         DMM1	0x100037	8
porttdp         DMM1	0x100038	8
portuap         DMM1	0x100039	8
clra            DMM1	0x10003C	8
clrb            DMM1	0x10003D	8
clrc            DMM1	0x10003E	8
clrd            DMM1	0x10003F	8
clre            DMM1	0x100040	8
clrf            DMM1	0x100041	8
clrg            DMM1	0x100042	8
clrh            DMM1	0x100043	8
clrj            DMM1	0x100044	8
clrdd           DMM1	0x100045	8
clreh           DMM1	0x100046	8
clrel           DMM1	0x100047	8
clras           DMM1	0x100048	8
clrqs           DMM1	0x100049	8
clrsd           DMM1	0x10004A	8
clrtc           DMM1	0x10004B	8
clrtd           DMM1	0x10004C	8
clrua           DMM1	0x10004D	8
pbcdpar         DMM1	0x100050	8
pfpar           DMM1	0x100051	8
pepar           DMM1	0x100052	16
pjpar           DMM1	0x100054	8
psdpar          DMM1	0x100055	8
paspar          DMM1	0x100056	16
pehlpar         DMM1	0x100058	8
pqspar          DMM1	0x100059	8
ptcpar          DMM1	0x10005A	8
ptdpar          DMM1	0x10005B	8
puapar          DMM1	0x10005C	8
;
;       Reset Control, Chip Configuration, and Power Management Registers
rcr             DMM1	0x110000	8
rsr             DMM1	0x110001	8
ccr             DMM1	0x110004	16
lpcr            DMM1	0x110006	16
rcon            DMM1	0x110008	16
cir             DMM1	0x11000A	16
;
;       Clock Module Registers
syncr           DMM1	0x120000	32
synsr           DMM1	0x120006	16
;
;       Edge Port Registers
eppar           DMM1	0x130000	16
epddr           DMM1	0x130002	8
epier           DMM1	0x130003	8
epdr            DMM1	0x130004	8
eppdr           DMM1	0x130005	8
epfr            DMM1	0x130006	8
;
;       Watchdog Timer Registers
wcr             DMM1	0x140000	16
wmr             DMM1	0x140002	16
wcntr           DMM1	0x140004	16
wsr             DMM1	0x140006	16
;
;       Programmable Interrupt Timer Registers
pcsr0           DMM1	0x150000	16
pmr0            DMM1	0x150002	16
pcntr0          DMM1	0x150004	16
pcsr1           DMM1	0x160000	16
pmr1            DMM1	0x160002	16
pcntr1          DMM1	0x160004	16
pcsr2           DMM1	0x170000	16
pmr2            DMM1	0x170002	16
pcntr2          DMM1	0x170004	16
pcsr3           DMM1	0x180000	16
pmr3            DMM1	0x180002	16
pcntr3          DMM1	0x180004	16
;
;       FlexCAN Registers 0
;canmcr0         DMM1	0x1C0000	32
;canctrl0        DMM1	0x1C0004	32
;cantimer0       DMM1	0x1C0008	32
;canrxgmask0     DMM1	0x1C0010	32
;canrx14mask0    DMM1	0x1C0014	32
;canrx15mask0    DMM1	0x1C0018	32
;canerrcnt0      DMM1	0x1C001C	32
;canerrstat0     DMM1	0x1C0020	32
;canimask0       DMM1	0x1C0028.	32
;caniflag0       DMM1	0x1C0030	32
;