;Register definition for MIPS 5Kc ;================================ ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; CP0 CP0 register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 ,32 or 64) ; ;name type addr size ;------------------------------------------- ; ; sp GPR 29 64 lr GPR 31 64 ; ; CP0 Registers ; index CP0 0 32 random CP0 1 32 elo0 CP0 2 32 elo1 CP0 3 32 context CP0 4 64 pmask CP0 5 32 wired CP0 6 32 bad CP0 8 64 ehi CP0 10 64 xcontext CP0 20 64 ; count CP0 9 32 compare CP0 11 32 status CP0 12 32 cause CP0 13 32 epc CP0 14 64 prid CP0 15 32 config CP0 0x010 32 config1 CP0 0x110 32 watchlo CP0 18 64 watchhi CP0 19 32 debug CP0 23 32 depc CP0 24 64 taglo CP0 0x01c 32 datalo CP0 0x11c 64 taghi CP0 0x01d 32 datahi CP0 0x11d 32 eepc CP0 30 64 desave CP0 31 64 ; ; ; DSU Registers ; dcr DMM1 0x0000 ibs DMM1 0x1000 dbs DMM1 0x2000 ; iba0 DMM1 0x1100 ibm0 DMM1 0x1108 ibasid0 DMM1 0x1110 ibc0 DMM1 0x1118 iba1 DMM1 0x1200 ibm1 DMM1 0x1208 ibasid1 DMM1 0x1210 ibc1 DMM1 0x1218 iba2 DMM1 0x1300 ibm2 DMM1 0x1308 ibasid2 DMM1 0x1310 ibc2 DMM1 0x1318 iba3 DMM1 0x1400 ibm3 DMM1 0x1408 ibasid3 DMM1 0x1410 ibc3 DMM1 0x1418 ; dba0 DMM1 0x2100 dbm0 DMM1 0x2108 dbasid0 DMM1 0x2110 dbc0 DMM1 0x2118 dbv0 DMM1 0x2120 dba1 DMM1 0x2200 dbm1 DMM1 0x2208 dbasid1 DMM1 0x2210 dbc1 DMM1 0x2218 dbv1 DMM1 0x2220 ; ; ; Memory Mapped Registers ;