;Register definition for PPC440EPx ;================================= ; ; name: user defined name of the register ; type: the type of the register ; GPR general purpose register ; SPR special purpose register ; MM memory mapped register ; DMMx direct memory mapped register with offset ; x = 1..4 ; the base is defined in the configuration file ; e.g. DMM1 0x02200000 ; IDCRx indirect accessed DCR's ; x = 1..4 ; the addr and data DCR is defined in the configuration file ; e.g. IDCR1 0x010 0x011 ; addr: the number, adddress or offset of the register ; size the size of the register (8,16 or 32) ; ;name type addr size ;------------------------------------------- ; sp GPR 1 ; ; Special Purpose Registers ; xer SPR 0x001 lr SPR 0x008 ctr SPR 0x009 dec SPR 0x016 srr0 SPR 0x01a srr1 SPR 0x01b pid SPR 0x030 decar SPR 0x036 csrr0 SPR 0x03a csrr1 SPR 0x03b dear SPR 0x03d esr SPR 0x03e ivpr SPR 0x03f usprg0 SPR 0x100 sprg4r SPR 0x104 sprg5r SPR 0x105 sprg6r SPR 0x106 sprg7r SPR 0x107 tblr SPR 0x10c tbur SPR 0x10d sprg0 SPR 0x110 sprg1 SPR 0x111 sprg2 SPR 0x112 sprg3 SPR 0x113 sprg4w SPR 0x114 sprg5w SPR 0x115 sprg6w SPR 0x116 sprg7w SPR 0x117 tblw SPR 0x11c tbuw SPR 0x11d pir SPR 0x11e pvr SPR 0x11f dbsr SPR 0x130 dbcr0 SPR 0x134 dbcr1 SPR 0x135 dbcr2 SPR 0x136 iac1 SPR 0x138 iac2 SPR 0x139 iac3 SPR 0x13a iac4 SPR 0x13b dac1 SPR 0x13c dac2 SPR 0x13d dvc1 SPR 0x13e dvc2 SPR 0x13f tsr SPR 0x150 tcr SPR 0x154 ivor0 SPR 0x190 ivor1 SPR 0x191 ivor2 SPR 0x192 ivor3 SPR 0x193 ivor4 SPR 0x194 ivor5 SPR 0x195 ivor6 SPR 0x196 ivor7 SPR 0x197 ivor8 SPR 0x198 ivor9 SPR 0x199 ivor10 SPR 0x19a ivor11 SPR 0x19b ivor12 SPR 0x19c ivor13 SPR 0x19d ivor14 SPR 0x19e ivor15 SPR 0x19f mcsrr0 SPR 0x23a mcsrr1 SPR 0x23b mcsr SPR 0x23c inv0 SPR 0x370 inv1 SPR 0x371 inv2 SPR 0x372 inv3 SPR 0x373 itv0 SPR 0x374 itv1 SPR 0x375 itv2 SPR 0x376 itv3 SPR 0x377 ccr1 SPR 0x378 dnv0 SPR 0x390 dnv1 SPR 0x391 dnv2 SPR 0x392 dnv3 SPR 0x393 dtv0 SPR 0x394 dtv1 SPR 0x395 dtv2 SPR 0x396 dtv3 SPR 0x397 dvlim SPR 0x398 ivlim SPR 0x399 rstcfg SPR 0x39b dcdbtrl SPR 0x39c dcdbtrh SPR 0x39d icdbtrl SPR 0x39e icdbtrh SPR 0x39f mmucr SPR 0x3b2 ccr0 SPR 0x3b3 icdbdr SPR 0x3d3 dbdr SPR 0x3f3 ; ; ; Directly Accessed DCR's ; cpr0_cfgaddr DCR 0x00C cpr0_cfgdata DCR 0x00D sdr0_cfgaddr DCR 0x00E sdr0_cfgdata DCR 0x00F sdram0_cfgaddr DCR 0x010 sdram0_cfgdata DCR 0x011 ebc0_cfgaddr DCR 0x012 ebc0_cfgdata DCR 0x013 ebm0_cfgaddr DCR 0x014 ebm0_cfgdata DCR 0x015 ppm0_cfgaddr DCR 0x016 ppm0_cfgdata DCR 0x017 ; ; PLB4 to PLB3 Bridge ; p4p3bo0_besr0 DCR 0x020 p4p3bo0_bearl DCR 0x022 p4p3bo0_bearh DCR 0x023 p4p3bo0_besr1 DCR 0x024 p4p3bo0_cfg DCR 0x026 p4p3bo0_picr DCR 0x027 p4p3bo0_peir DCR 0x028 p4p3bo0_revid DCR 0x02A ; ; PLB3 to PLB4 Bridge ; p3p4bi0_besr0 DCR 0x030 p3p4bi0_bearl DCR 0x032 p3p4bi0_bearh DCR 0x033 p3p4bi0_besr1 DCR 0x034 p3p4bi0_cfg DCR 0x036 p3p4bi0_picr DCR 0x037 p3p4bi0_peir DCR 0x038 p3p4bi0_revid DCR 0x03A ; ; PLB3 Arbiter ; plb3a0_revid DCR 0x072 plb3a0_besr DCR 0x074 plb3a0_bear DCR 0x076 plb3a0_acr DCR 0x077 ; ; Clocking and Power Management ; cpm0_sr DCR 0x0b0 cpm0_er DCR 0x0b1 cpm0_fr DCR 0x0b2 ; ; ; Indirectly Accessed DCR's ; ; IDCR1 must be set to SDRAM0_CFGADDR and SDRAM0_CFGDATA ; IDCR2 must be set to EBC0_CFGADDR and EBC0_CFGDATA ; IDCR3 must be set to EBM0_CFGADDR and EBM0_CFGDATA ; IDCR4 must be set to PPM0_CFGADDR and PPM0_CFGDATA ; IDCR5 must be set to CPR0_CFGADDR and CPR0_CFGDATA ; IDCR6 must be set to SDR0_CFGADDR and SDR0_CFGDATA ; ; ; DDR-SDRAM Controller DCRs ; ddr0_00 IDCR1 0 ddr0_01 IDCR1 1 ddr0_02 IDCR1 2 ddr0_03 IDCR1 3 ddr0_04 IDCR1 4 ddr0_05 IDCR1 5 ddr0_06 IDCR1 6 ddr0_07 IDCR1 7 ddr0_08 IDCR1 8 ddr0_09 IDCR1 9 ddr0_10 IDCR1 10 ddr0_11 IDCR1 11 ddr0_12 IDCR1 12 ddr0_14 IDCR1 14 ddr0_17 IDCR1 17 ddr0_18 IDCR1 18 ddr0_19 IDCR1 19 ddr0_20 IDCR1 20 ddr0_21 IDCR1 21 ddr0_22 IDCR1 22 ddr0_23 IDCR1 23 ddr0_24 IDCR1 24 ddr0_25 IDCR1 25 ddr0_26 IDCR1 26 ddr0_27 IDCR1 27 ddr0_28 IDCR1 28 ddr0_31 IDCR1 31 ddr0_32 IDCR1 32 ddr0_33 IDCR1 33 ddr0_34 IDCR1 34 ddr0_35 IDCR1 35 ddr0_36 IDCR1 36 ddr0_37 IDCR1 37 ddr0_38 IDCR1 38 ddr0_39 IDCR1 39 ddr0_40 IDCR1 40 ddr0_41 IDCR1 41 ddr0_42 IDCR1 42 ddr0_43 IDCR1 43 ddr0_44 IDCR1 44 ; ; ; External Bus Controller DCRs ; ebc0_b0cr IDCR2 0x00 ebc0_b1cr IDCR2 0x01 ebc0_b2cr IDCR2 0x02 ebc0_b3cr IDCR2 0x03 ebc0_b4cr IDCR2 0x04 ebc0_b5cr IDCR2 0x05 ebc0_b0ap IDCR2 0x10 ebc0_b1ap IDCR2 0x11 ebc0_b2ap IDCR2 0x12 ebc0_b3ap IDCR2 0x13 ebc0_b4ap IDCR2 0x14 ebc0_b5ap IDCR2 0x15 ebc0_bear IDCR2 0x20 ebc0_besr0 IDCR2 0x21 ebc0_besr1 IDCR2 0x22 ebc0_cfg IDCR2 0x23 ebc0_cid IDCR2 0x24 ; ; ; Clocking and PowerOn Reset DCR ; cpr0_clkupd IDCR5 0x0020 cpr0_pllc IDCR5 0x0040 cpr0_plld IDCR5 0x0060 cpr0_primad IDCR5 0x0080 cpr0_primbd IDCR5 0x00A0 cpr0_opbd IDCR5 0x00C0 cpr0_perd IDCR5 0x00E0 cpr0_mald IDCR5 0x0100 cpr0_spcid IDCR5 0x0120 cpr0_icfg IDCR5 0x0140 ; ; ; Serial Device Control ; sdr0_sdstp0 IDCR6 0x0020 sdr0_sdstp1 IDCR6 0x0021 sdr0_pinstp IDCR6 0x0040 sdr0_sdcs0 IDCR6 0x0060 sdr0_ecid0 IDCR6 0x0080 sdr0_ecid1 IDCR6 0x0081 sdr0_ecid2 IDCR6 0x0082 sdr0_ecid3 IDCR6 0x0083 sdr0_jtag IDCR6 0x00C0 sdr0_ddrdl0 IDCR6 0x00E0 sdr0_ebc0 IDCR6 0x0100 sdr0_uart0 IDCR6 0x0120 sdr0_uart1 IDCR6 0x0121 sdr0_uart2 IDCR6 0x0122 sdr0_uart3 IDCR6 0x0123 sdr0_cp440 IDCR6 0x0180 sdr0_srst0 IDCR6 0x0200 sdr0_srst1 IDCR6 0x0201 sdr0_slpipe0 IDCR6 0x0220 sdr0_amp0 IDCR6 0x0240 sdr0_amp1 IDCR6 0x0241 sdr0_mirq0 IDCR6 0x0260 sdr0_mirq1 IDCR6 0x0261 sdr0_maltbl IDCR6 0x0280 sdr0_malrbl IDCR6 0x02A0 sdr0_maltbs IDCR6 0x02C0 sdr0_malrbs IDCR6 0x02E0 sdr0_pci0 IDCR6 0x0300 sdr0_usb2d0cr IDCR6 0x0320 sdr0_usb2h0cr IDCR6 0x0340 sdr0_cust0 IDCR6 0x4000 sdr0_sdstp2 IDCR6 0x4001 sdr0_cust1 IDCR6 0x4002 sdr0_sdstp3 IDCR6 0x4003 sdr0_pfc0 IDCR6 0x4100 sdr0_pfc1 IDCR6 0x4101 sdr0_pfc2 IDCR6 0x4102 sdr0_usb2phy0cr IDCR6 0x4103 sdr0_pfc4 IDCR6 0x4104 sdr0_mfr IDCR6 0x4300 sdr0_emac0rxst IDCR6 0x4301 sdr0_emac0txst IDCR6 0x4302 sdr0_emac0rejcnt IDCR6 0x4303 sdr0_emac1rxst IDCR6 0x4304 sdr0_emac1txst IDCR6 0x4305 sdr0_emac1rejcnt IDCR6 0x4306 sdr0_iccrtx IDCR6 0x430B sdr0_iccrrx IDCR6 0x430C sdr0_ictrtx0 IDCR6 0x430D sdr0_ictrtx1 IDCR6 0x430E sdr0_ictrrx0 IDCR6 0x430F sdr0_ictrrx1 IDCR6 0x4310 sdr0_icsrtx0 IDCR6 0x4307 sdr0_icsrtx1 IDCR6 0x4308 sdr0_icsrrx0 IDCR6 0x4309 sdr0_icsrrx1 IDCR6 0x430A sdr0_hsf IDCR6 0x4400 sdr0_cryp0 IDCR6 0x4500 sdr0_usb2h0st IDCR6 0x4600 ; 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